发明名称 |
Pattern generator for semiconductor test unit with address generator section |
摘要 |
The pattern generator includes a sequence control B (8) which produces a control signal (9). A flip-flop circuit network (5) also included distributes the control signal (9) to each of the address generators (10). The sequence control produces the control signal consisting only of one line. The pattern generator is also provided with a sequence storage, a sequence address generator, a repeat counter and a determination circuit.
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申请公布号 |
DE19502828(A1) |
申请公布日期 |
1995.08.10 |
申请号 |
DE19951002828 |
申请日期 |
1995.01.30 |
申请人 |
ADVANTEST CORP., TOKIO/TOKYO, JP |
发明人 |
IKEDA, NAOHIRO, TOKIO/TOKYO, JP |
分类号 |
G01R31/3183;G01R31/319;(IPC1-7):G01R31/318 |
主分类号 |
G01R31/3183 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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