发明名称 |
System for guaranteed CPU bus access by I/O devices monitoring separately predetermined distinct maximum non CPU bus activity and inhibiting I/O devices thereof |
摘要 |
A method and system for controlling access to a system bus in a computer system is provided. The system devices include a central processing unit, a memory controller for controlling access to system memory, and at least one input/output device having a coprocessor incorporated therein. The system bus electrically connects the system devices. Any one of the system devices may serve as a bus master of the system bus at any one time when communicating over the bus with each other or with system memory. Each of the at least one input/output device incorporates control logic therein for (i) monitoring bus activity to calculate the bus mastering time during which the memory controller and the at least one input/output device control the bus, and (ii) outputting an inhibit signal which denies access to the bus by the at least one input/output device if the calculated bus mastering time is equal to or greater than a predetermined bus mastering time period.
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申请公布号 |
US5444855(A) |
申请公布日期 |
1995.08.22 |
申请号 |
US19920870581 |
申请日期 |
1992.04.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
THOMPSON, STEPHEN P. |
分类号 |
G06F13/362;G06F13/372;(IPC1-7):G06F13/36 |
主分类号 |
G06F13/362 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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