发明名称 MULTIPLEX STM-ATM CONVERSION DEVICE
摘要 <p>PURPOSE: To provide 8 scheduling method Which is adaptive to any STM speed by reducing the size of a cell buffer and therefore to automatically allocate the channels on an STM circuit. CONSTITUTION: The time slot position set in the frame cycle of an STM signal is inputted to a virtual route identifier (VPC) decision part 102, and the VPC data are inputted to a cell buffer 101 by referring to a VPC correspondence table corresponding to the byte data on the time slot position. The STM data are written into the buffer 101 in every byte in its write mode. At the same time, the VPC queue area where the STM data are written is measured based on the size of a cell. Then a cell formation decision part 103 decides whether the VPC queue area is increased or not, and a VPC is written into a FIFO 104. An ATM cell is read out of the buffer 101 by the VPC outputted from the FIFO 104 and is outputted via an AAL processing part 105 and an ATM processing part 106 and with addition of the ATM overhead.</p>
申请公布号 JPH08307425(A) 申请公布日期 1996.11.22
申请号 JP19950110582 申请日期 1995.05.09
申请人 NEC CORP 发明人 NISHIHARA MOTOO
分类号 H04J3/00;H04L12/66;H04L12/951;H04Q11/04;(IPC1-7):H04L12/28 主分类号 H04J3/00
代理机构 代理人
主权项
地址