| 摘要 |
<p>PROBLEM TO BE SOLVED: To implement the correction of an excessively erased cell in a short time by applying a high voltage to a digit line while a word line is biased below a potential to be set in reading to perform a writing for the correction of excessive erasure. SOLUTION: When a data is written into a memory cell 11, a high voltage is applied to a digit line D1 from a writing circuit 5 through a Y decoder 3. At the same time, a high voltage is applied to a word line W1 by an X decoder 2 to let a channel current flow to the cell M11 and induced channel hot electrons are injected to a floating gate to elevate a VTM. In erasing, a high voltage is applied to source lines S1-Sm by an erasing circuit 6 while the word lines W1-Wm are biased to 0V by the decoder 2. Thus, electrons stored at the floating gate is drawn out to the side of the source to lower the threshold voltage of the memory cell thereby erasing all memory in a memory cell.</p> |
