发明名称 LAYOUT EDITOR FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a layout editor which is difficult to make correction errors in elimination working of a layout diagram in a mask layout design for a semiconductor integrated circuit. SOLUTION: A storage device 2 stores layout data 20, elimination instruction layout data 21 and display layout data 22. The data 20 is generated/edited by using a data editing means 11 of a data processor 1. When elimination is performed on the layout data, the data 21 is generated/edited by using the means 11. When the data 21 is generated, a diagram logic operating means 10 subtracts the data 21 from the data 20 and updates the data 22. Then, a displaying means 12 shows the updated display layout data on a display device 5.</p>
申请公布号 JP2000172735(A) 申请公布日期 2000.06.23
申请号 JP19980347483 申请日期 1998.12.07
申请人 NEC CORP 发明人 SHIOBARA RISAKO
分类号 G03F1/68;G03F1/70;G06F17/50;(IPC1-7):G06F17/50;G03F1/08 主分类号 G03F1/68
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