发明名称 FORMATION OF FERROELECTRIC MEMORY CIRCUIT
摘要 PROBLEM TO BE SOLVED: To form a ferroelectric memory circuit by performing first annealing in ozone atmosphere, forming/defining an upper electrode on a ferroelectric layer, performing second annealing, defining a lower electrode and then performing third annealing. SOLUTION: When a ferroelectric memory circuit is formed, a lower electrode structure is formed on an underlying layer and a ferroelectric layer is provided on the lower electrode. Subsequently, a step for performing first annealing in ozone atmosphere, a step for forming/defining an upper electrode on the ferroelectric layer, a step for defining a lower electrode, and a step for performing third annealing are carried out sequentially. Preferably, an individual contact window reaching the upper and lower electrodes is defined in a glass layer, Fourth annealing is performed, a contact window is formed in a substrate to the glass layer, a metallization layer is formed/defined on the glass layer and in the contact window, and then fifth annealing is performed.
申请公布号 JP2000200881(A) 申请公布日期 2000.07.18
申请号 JP20000043310 申请日期 2000.02.21
申请人 SEIKO EPSON CORP 发明人 PATEL DIVYESH N;SHELDON DOUGLAS
分类号 G11C11/22;H01L21/02;H01L21/31;H01L21/314;H01L21/316;H01L21/321;H01L21/324;H01L21/822;H01L21/8242;H01L21/8246;H01L21/8247;H01L27/04;H01L27/10;H01L27/105;H01L27/108;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/10;H01L21/824 主分类号 G11C11/22
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