发明名称 |
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF |
摘要 |
PURPOSE: A chip layered semiconductor package is provided to easily perform a wire bonding at a lower chip due to keeping regular intervals between chips by using a conductive supplying part and to prevent a peel-off due to moisture between chips by molding the space between chips with a resin. CONSTITUTION: A first chip(12) is fixed on a defined region of a PCB(Printed Circuit Board)(10). A conductive supplying part(20) is adhered to the edge of the PCB(10) by an adhesive part(18). A second chip(14) is fixed on the rear surface of the supplying part(20) by the same adhesive part(18). First wires(22) are connected between the bonding pads of the first chip(12) and a conductive pattern(16) exposed on the PCB(10). Second wires(24) are connected between the bonding pads of the second chip(14) and the conductive pattern(16). A resin(26) molding is performed to the space between the chips(12,14) and the first and second wires(22,24) are also molded with the resin(26). |
申请公布号 |
KR20020031718(A) |
申请公布日期 |
2002.05.03 |
申请号 |
KR20000062392 |
申请日期 |
2000.10.23 |
申请人 |
AMKOR TECHNOLOGY KOREA, INC. |
发明人 |
BAEK, JONG SIK;JUNG, YEONG SEOK;PARK, IN BAE;SEO, SEONG MIN |
分类号 |
H01L23/12;(IPC1-7):H01L23/12 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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