发明名称 |
Semiconductor memory device with internal power supply potential genaration circuit |
摘要 |
In an eDRAM, there are provided a VDC that down-converts an external power supply potential to generate an internal power supply potential for a sense amplifier band, and a VDC that down-converts the external power supply potential to generate an internal power supply potential for a column decoder. The response of the VDC is improved by increasing the through current of the VDC only during the period of time corresponding to an amplify operation of the sense amplifier. Therefore, current consumption is smaller than the conventional case where the through current of the VDC is set at a high constant level.
|
申请公布号 |
US2002060942(A1) |
申请公布日期 |
2002.05.23 |
申请号 |
US20010827897 |
申请日期 |
2001.04.09 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
AKIYAMA MIHOKO;YAMAZAKI AKIRA;MORISHITA FUKASHI;TAITO YASUHIKO;FUJII NOBUYUKI;OKAMOTO MAKO |
分类号 |
G11C11/407;G11C5/14;G11C11/401;G11C11/409;(IPC1-7):G11C5/00 |
主分类号 |
G11C11/407 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|