发明名称 LAMINATION PACKAGING METHOD OF SEMICONDUCTOR CHIP
摘要 <p>PROBLEM TO BE SOLVED: To provide the lamination packaging method of a semiconductor chip for reducing heat history applied to a junction section in the lamination packaging of the semiconductor chip, making uniform a reaction layer along with each lamination layer, and improving reliability. SOLUTION: In the lamination packaging method of the semiconductor chip 1 for successively laminating a plurality of semiconductor chips 1 having solder 4, the solder 4 of the opposing semiconductor chips 1 is activated, the opposing semiconductor chips 1 are aligned, the semiconductor chips 1 that oppose one another by pressurization are laminated and joined without forming any solder junction layers 5, and a group of semiconductor chips is collectively heated to form the solder junction layers 5 after the lamination junction of all the semiconductor chips 1 is completed.</p>
申请公布号 JP2002170919(A) 申请公布日期 2002.06.14
申请号 JP20000368539 申请日期 2000.12.04
申请人 NEC CORP;MITSUBISHI ELECTRIC CORP 发明人 TAGO MASAKI;TOMITA YOSHIHIRO
分类号 H01L25/18;H01L21/768;H01L21/98;H01L23/12;H01L25/065;H01L25/07;(IPC1-7):H01L25/065 主分类号 H01L25/18
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