发明名称 |
CMOS phase locked loop with voltage controlled oscillator having realignment to reference and method for the same |
摘要 |
A periodic controlled realignment of the ring oscillator VCO in a phase locked loop is used to effect phase correction in a CMOS phase locked loop. A realignment to a buffered version of the reference signal is conducted periodically, at a time when an edge of the VCO waveform would ideally coincide with an edge in the reference signal. A preferred embodiment CMOS phase locked loop of the invention uses a ring oscillator voltage controlled oscillator. A divide by M circuit is driven by an output of the voltage controlled oscillator. A control voltage circuit accepts a reference signal and a signal from the divide by M circuit, and produces a control voltage proportional to a phase difference between the output of the voltage controlled oscillator and the reference signal to control the voltage controlled oscillator. A realignment circuit responsive to the reference signal provides a realignment signal into the voltage controlled oscillator when an edge in the waveform of the voltage controlled oscillator ideally coincides with an edge of the reference signal.
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申请公布号 |
US2003137357(A1) |
申请公布日期 |
2003.07.24 |
申请号 |
US20020051378 |
申请日期 |
2002.01.18 |
申请人 |
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA |
发明人 |
YE SHENG;GALTON IAN |
分类号 |
H03L7/083;H03L7/099;H03L7/18;(IPC1-7):H03B27/00 |
主分类号 |
H03L7/083 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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