发明名称 |
Implementation of an inhibit during soft programming to tighten an erase voltage distribution |
摘要 |
Methods and apparatus for tightening an erased bit threshold voltage distribution are disclosed. According to one aspect of the present invention, a method for processing erased bits associated with an erased bit distribution which includes an over-erased bit which has a first value that is less than a first threshold voltage value and a bit that has a second value that substantially exceeds a second threshold voltage value includes inhibiting the fast bit. The method also includes applying a soft program pulse to the erased bits such that inhibiting the fast bit substantially prevents the second value from changing and applying the soft program pulse to the over-erased bit substantially causes the first value to increase. In one embodiment, applying the soft program pulse to the over-erased bit substantially causes the first value to increase to a value that is greater than or equal to the first threshold voltage value.
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申请公布号 |
US2003147279(A1) |
申请公布日期 |
2003.08.07 |
申请号 |
US20020068245 |
申请日期 |
2002.02.06 |
申请人 |
SANDISK CORPORATION |
发明人 |
PAN FENG;YU TAT-KWAN EDGAR |
分类号 |
G11C16/34;(IPC1-7):G11C11/34 |
主分类号 |
G11C16/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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