发明名称 Circuit and method for interfacing to a bus channel
摘要 A circuit and method for interfacing to a bus via an on-die termination pad are shown. The present invention derives an output low reference voltage from an external terminating voltage and an external reference voltage corresponding to the middle of a logic voltage range. A feedback loop is used to compare a voltage at the pad to the output low reference voltage. An on-die termination current sourced to the pad is adjusted accordingly. This allows the present invention to adapt to a variety of external termination voltages. Further, the output low reference voltage is utilized to generate a reference current sourced to an output amplifier, which causes the output swing of the amplifier to track along with the external terminating voltage and the external reference voltage. In another aspect of the present invention, an alternating pattern of logic high and logic low voltage values is transmitted at the pad and received. The received data pattern is compared to the transmitted data pattern to adjust the on-die termination current and the reference current.
申请公布号 US2003189441(A1) 申请公布日期 2003.10.09
申请号 US20010930694 申请日期 2001.08.15
申请人 NGUYEN HUY;VU ROXANNE;LAU BENEDICT 发明人 NGUYEN HUY;VU ROXANNE;LAU BENEDICT
分类号 G06F13/40;(IPC1-7):H03K17/16 主分类号 G06F13/40
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