发明名称 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for fabricating a semiconductor device is provided to reduce gate induced drain leakage(GIDL) and increase an interval of data retention time of a cell by partially forming a thick gate insulation layer at the edge of an active region of a semiconductor substrate. CONSTITUTION: An isolation layer(33) for defining an active region is formed on the semiconductor substrate(31). Impurity ions are partially injected to the active region. The thick gate insulation layer is formed at the edge of the active region. A conductive layer for a gate electrode(40) and a mask insulation layer are formed on the gate insulation layer. A mask insulation layer pattern(42), the gate electrode and a gate insulation layer pattern(36,38) are formed by a photolithography process using a gate electrode mask. A thick gate insulation layer pattern is formed at the edge of the active region. A dummy gate electrode partially overlapping the active region is formed. Low density impurity ions are injected to the substrate at both sides of the gate electrode to form a source/drain region.
申请公布号 KR20030089629(A) 申请公布日期 2003.11.22
申请号 KR20020027090 申请日期 2002.05.16
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, WON CHANG
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
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