Back gate in select transistor for eDRAM

摘要

This disclosure relates to an eDRAM memory element comprising a first storage node, a bitline node for accessing the value stored in the storage node, and a select transistor, controlling access from the bitline node to the storage node, wherein the select transistor has a front gate and a back gate.

主权项

1. An eDRAM group comprising at least a first and a second eDRAM memory element, each of the first and the second eDRAM memory elements including a first storage node, a bitline node for accessing the value stored in the storage node, and a select transistor controlling access from the bitline node to the storage node, the select transistor having a front gate and a back gate, wherein the back gate of the first eDRAM memory element is connected to the back gate of the second eDRAM memory element, wherein the bitline node of the first eDRAM memory element is the same as the bitline node of the second eDRAM memory element.