发明名称 Dynamic memory arrangement for providing noncyclic data permutations
摘要 Circuit arrangement for noncyclic data permutations between the memory cells of a dynamic memory including a permutation network for transferring the contents of a predetermined memory cell into the access port or read-write cell of the memory and an access control system for producing a permutation sequence. The permutation network is comprised of 2k-1 memory cells which are arranged in a tree-like structure in k of 0 to k-1 numbered planes so that plane i is formed of 2i memory cells. Each memory cell of plane i is connected to two adjacent interconnected memory cells of plane i+1 so that these three memory cells form a triangle in which the contents of these cells can be cyclically interchanged in a clockwise direction. Each memory cell of the planes 1 </= i </= k-2 belongs to two triangles while the one memory cell of plane 0, which acts as the access port or read-write cell, and the memory cells of plane k-1 belong to but one triangle. The access control system provides for the simultaneous transfer of the contents of the memory cells disposed in even numbered planes to the associated memory cells of the next higher odd numbered planes (permutation A) or for the simultaneous transfer of the contents of the memory cells disposed in odd numbered planes to the associated memory cells of the next higher even numbered plane (permutation B) to effect either permutation A or permutation B.
申请公布号 US4030078(A) 申请公布日期 1977.06.14
申请号 US19750641593 申请日期 1975.12.16
申请人 GESELLSCHAFT FUR MATHEMATIK UND DATENVERARBEITUNG M.B.H. 发明人 KLUGE, WERNER
分类号 G06F7/76;(IPC1-7):G11C9/02;G11C19/00;G11C21/00 主分类号 G06F7/76
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