| 摘要 |
PURPOSE:To increase the power supply margin as well as to realize the less power consumption by changing the application method of the input signal. CONSTITUTION:Input signal phi is applied in common to the gates of 1st serial circuit's MISFETQ1 and Q2, and signal Q of the connection between 2nd serial circuit's MISFETQ4 and Q5 is applied in common to the gates of 3rd serial circuit's MISFETQ7 and Q9 to be used as the output. With variation of phi from ''L'' to ''H'' and then to ''L'' again, signal A maintains ''H'' with ON of Q1 and Q keeps ''L'' caused by the memory capacity with OFF of Q5. And only signal B changes to ''H'' with ON of MISFETQ8. In this case, the voltage of both terminals is reduced for Q1 and Q2 carrying out the complementary function by the ON resistance of Q3 although the rise of B is quick and thus Q3 is turned on before switching of Q1 and Q2. Thus, the through current decreases to realize the power reduction. And A is given a level-up by the amount equivalent to the ON resistance of Q3, thus reducing the change given to the low-level side of A. |
