| 摘要 |
The invention relates to a circuit arrangement for coding or decoding wherein check bits are formed using a cyclic code, in which an information polynomial is divided by a generator polynomial. The coding permits adaptation to the checking requirements in the simplest manner. The invention provides apparatus for dividing the binary information into a plurality of words of equal bit numbers, a modulo-2-adder, and a partial decoder. The partial decoder divides the words by the generator polynomial and the remainder determined is added to the next word in the modulo-2-adder. The partial coder can be an ROM. The circuit arrangement is particularly suitable for utilization in telecontrol installations.
|
