发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To obtain resistance elements of high resistance value with high accuracy and a smaller occupying space by a method wherein the resistance element in a bipolar IC is formed in such a manner than an emitter region is diffused, then an insulative film is removed from a region where the resistance element will be formed later, and then impurity ions are implanted. CONSTITUTION:During the process of forming a base region 5 of a transistor, P type resistor terminal portions 6 are formed in each n type epitaxial region 2 surrounded by a separation layer 4. After diffusing an emitter region 7, an insulative film 9 locating on a region for a resistance element is photo-etched witha resist mask 10, and p type impurity ions are implanted into the region under low energy. Then, the implanted layer 11 is covered with an insulative film 9' and thus obtained chip is subject to the annealing process. Subsequently, contact openings are bored to form respective electrodes of the transistor and electrodes R1, R2 of resistor terminals. By so doing, it becomes possible to form the resistance element of high resistance value with high accuracy in a smaller space, thus improving operation characteristic of the circuit.
申请公布号 JPS5773963(A) 申请公布日期 1982.05.08
申请号 JP19810135526 申请日期 1981.08.31
申请人 HITACHI SEISAKUSHO KK 发明人 OGURA SADAO
分类号 H01L27/04;H01L21/331;H01L21/822;H01L21/8222;H01L27/06;H01L29/73 主分类号 H01L27/04
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