| 摘要 |
PURPOSE:To decrease the number of MOSFETs constituting a shift register, by applying a plurality of clock pulses to the same number of units in series connection of phase inverting amplifiers and transfer gates. CONSTITUTION:When a clock pulse phi1 goes to (1), a transfer gate 13 turns on and input information V0 is transferred to the output side as V1 via an inverting amplifier 10. Next, when a clock pulse phi2 goes to (1), information V2 at the output of an inverting amplifier 11 is transferred as V3 to the output of an inverting amplifier 12. Further, when the clock pulse phi2 goes to (1), the information V1 is given to the output as V2 via a transfer gate 14 and the amplifier 11. Thus, the transfer of data is finished in one period of pulses phi1-phi3 and the respective information V1-V3 constitutes 2-bit's share. Thus, a unit consisting of a phase inverting amplifier and a transfer gate is connected in cascade by (n+1) units, allowing to constitute a shift register in n-bit. |
