发明名称 GENERATION OF LOGICAL SIGNAL
摘要 PURPOSE:To generate a logical signal with limited amount of data accurately, by arranging a means which shifts the logical level of a logical signal generated to a post-transition value in the data when the current time after the generation of the logical signal coincides the logical level transition time in the data for generation of logical signals. CONSTITUTION:In an engine control simulator 8, data for generation of logical signals held in a disc unit 12 is fed to a buffer memory 20 through a memory 16 with the action of channel controls 14 and 18 by measuring and memorizing an engine real signal or inputting and memorizing it by an operator on a keyboard. The transition time data in a memory 20 is compared with the current time being counted with a counter 24 using a time comparator circuit 26. When both the time coincides, the logical level at a specified port of an output latch circuit 28 is transited to generate a signal corresponding to the data memorized.
申请公布号 JPS6128879(A) 申请公布日期 1986.02.08
申请号 JP19840150447 申请日期 1984.07.19
申请人 TOYOTA MOTOR CORP;NIPPON DENSO CO LTD 发明人 NAKANO JIRO;ITO YOSHIZO;FUKAYA HIROYASU;IKEDA GENZO;MUROZAKI TAKASHI
分类号 G01R31/28;F02D41/00;F02D41/22;F02D41/24;F02D45/00;G01D9/00;G05B23/02 主分类号 G01R31/28
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