| 发明名称 |
LOW CONTACT RESISTANCE THIN FILM TRANSISTOR |
| 摘要 |
The present invention relates to a novel thin film transistor (TFT) comprising a substrate (100) with a gate electrode layer (101) deposited and patterned thereon and a gate insulator layer (102) deposited on the gate electrode layer and the substrate, characterized in that the transistor further comprises (i) a carrier injection layer (103) arranged above the gate insulator layer, (ii) a source/drain (S/D) electrode layer (104) deposited on the carrier injection layer, and (iii) a semiconductor layer (106), methods for the production of such novel TFTs, devices comprising such TFTs, and to the use of such TFTs. |
| 申请公布号 |
US2016284853(A1) |
申请公布日期 |
2016.09.29 |
| 申请号 |
US201415036662 |
申请日期 |
2014.11.13 |
| 申请人 |
PHAM Duy Vu;SU Kuo Hui |
发明人 |
PHAM Duy Vu;SU Kuo Hui |
| 分类号 |
H01L29/786;H01L29/45;H01L27/12;H01L29/66;H01L21/02;H01L29/417;H01L23/31 |
主分类号 |
H01L29/786 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A thin film transistor (TFT) comprising a substrate with a gate electrode layer deposited and patterned thereon and a gate insulator layer deposited on the gate electrode layer and the substrate, wherein the TFT further comprises (i) a carrier injection layer arranged above the gate insulator layer, (ii) a source/drain (S/D) electrode layer deposited on the carrier injection layer, and (iii) a semiconductor layer, wherein the TFT is patterned such that the semiconductor layer directly contacts the gate insulator layer, the carrier injection layer and the S/D electrode layer. |
| 地址 |
Oberhausen DE |
