发明名称 Integrating analog to digital converter
摘要 An integrating analog-to-digital converter (ADC) which calculates the coarse portion of its output by integrating an input analog signal over a predetermined number of time intervals during runup using a known technique to define the analog signal in terms of a slope count. The invention is particularly characterized in that an ADC is used in lieu of rundown of the integrator voltage to calculate the fine portion of the ADC output also in terms of slope count. This is accomplished by converting the residual analog signal remaining at the end of runup into a fractional slope count which can be added to the slope count determined during runup so that the resulting total slope count is directly proportional to the input voltage. To maintain linearity, calibration of the circuit is necessary and is accomplished by calculating a calibration constant which relates the ADC reading to slope count. The resulting calibration constant is then multiplied by the ADC output representative of the residual integrator voltage in order to determine the slope count representative of the residual integrator voltage. Such calibration is performed periodically in order to account for time and temperature fluctuations caused by ambient conditions.
申请公布号 US5101206(A) 申请公布日期 1992.03.31
申请号 US19890446232 申请日期 1989.12.05
申请人 HEWLETT-PACKARD COMPANY 发明人 RIEDEL, RONALD J.
分类号 H03M1/14;H03M1/38;H03M1/52 主分类号 H03M1/14
代理机构 代理人
主权项
地址