| 摘要 |
PURPOSE:To increase the resistance to soft errors without increasing the cell area, by depositing one TFT conductor layer above the other TFT conductor layer to form a coupling capacity between them. CONSTITUTION:A polysilicon layer 1 connected to one storage node N1 is deposited under a gate electrode 3P of a TFT Q3 through a deposited insulating layer 4, whereby a coupling capacity C is formed between the electrode and the polysilicon layer 1. This means that the coupling capacity is connected between the gate electrodes of Q3 and Q4. Further, the connection of 4P, which becomes an active layer, with the storage node N1 is made through polysilicon 3. In the polysilicon 3, the contact resistance can be set to any value by appropriately setting the amount of impurity ions to be implanted. By this, the CR constant of a memory cell can be made larger to increase the resistance to soft errors.
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