SUBSTEP CONTROL SIGNAL GENERATING CIRCUIT AND STEP PULSE GENERATING CIRCUIT WITH THIS

摘要

The step pulse generating circuit for receiving a first step pulse from a system driving a disk drive and generating a second step pulse varying a phase of a stepping motor includes: a substep control signal generating circuit having a logic circuit for generating a signal responsive to the fist step pulse, a timer for generating a clock signal and a flip-flop for generating a step enable signal; a substep pulse generating circuit for receiving the output of the substep control signal generating circuit and generating a substep pulse; and an output circuit for generating the second step pulse. The circuit stably drives the stepping motor.