发明名称 CIRCUIT FOR GENERATING MODULAR CLOCKING SIGNALS
摘要 CIRCUIT FOR GENERATING MODULAR CLOCKING SIGNALS A clock signal circuit provides a clock signal to one or more portions of an electronic system selectively disabling the clock signal from being provided to selected portions of the electronic system during times when those portions are not being used thereby to effectively reduce the power consumed by the electronic system.
申请公布号 CA2096468(A1) 申请公布日期 1994.11.19
申请号 CA19932096468 申请日期 1993.05.18
申请人 LEE, ROBERT H. J.;KENNY, JOHN D. 发明人 LEE, ROBERT H. J.;KENNY, JOHN D.
分类号 G06F1/32;(IPC1-7):G06F13/372 主分类号 G06F1/32
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