| 摘要 |
The present invention relates to a macro instruction set computer (MISC) architecture having main memory for storing system softwares of the computer, instructions, and user programs; first memory for storing preparatory data for operations, intermediate results of operations and the final results of completed operations, and operating in stack form; second memory for storing the break point address of subprograms and address for recovery of the break point while returning from a call, and operating in stack form; a CPU having: address management for the main memory; main memory data port for receiving instructions and data from main memory and writing data in the CPU into main memory; control logic combinational decoding for decoding instructions from main memory and generating control signals controlling the operations of the computer; ALU for performing arithmetic and logic operation functions; top of stack, next to the top of stack and the third one to the top of stack register of the first memory; top of stack register and instruction repeating execution control of the second memory; management device for the first and second memory for performing operations of writing to and reading from the first and second memory.
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