| 摘要 |
An electronic matrix array device such as a data store, e.g. a datacard, or an electro-optic active matrix display, has crossing sets of row and column conductors and matrix elements such as memory or picture cells at the crossing intersections. At least some of the matrix elements include a two-terminal thin film non-linear impedance element which may be bi-directional, such as a MIM, or unidirectional, such as a diode. The array device also includes a row address decoder for addressing the row conductors and a column address decoder for addressing the column conductors, either or both decoders having respective stages for respective conductors of the relevant set of conductors. Each decoder stage is a multi-input single output logic (AND) gate circuit having a capacitance at its output, each input being connected to the output via a respective non-linear impedance element of the same kind as employed in the matrix array, the inputs receiving address codes from a common address bus from which the gate circuit derives a selection signal for the row or column being addressed. Consequently, such a decoder can be readily integrated with at least part of the matrix array by common thin film fabrication therewith on the same substrate. This simplifies manufacture and reduces the requisite number of external connections to the array device.
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