发明名称 Process for obtaining a transistor having a silicon-germanium gate
摘要 The process includes the deposition of a stack of Si/Si1-xGex/Si layers (2, 3, 4) on a gate oxide layer (1) in a single-wafer reactor and then the etching of the gate (GR) using an inorganic mask (5). Next, the gate (GR) is encapsulated in a material (7) which is non-oxidizing with respect to germanium before the isolating spacers (8) are formed.
申请公布号 US5998289(A) 申请公布日期 1999.12.07
申请号 US19980102849 申请日期 1998.06.23
申请人 FRANCE TELECOM 发明人 SAGNES, ISABELLA
分类号 C23C16/22;H01L21/28;H01L21/3213;H01L29/49;H01L29/78;(IPC1-7):H01L29/772 主分类号 C23C16/22
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