PURPOSE: An output buffer circuit is provided to prevent through current from being generated between a power supply voltage and a ground voltage by turning on transistors for pull up and pull down after turning off for predetermined period. CONSTITUTION: An output buffer control part(10) outputs a pull up control signal and a pull down control signal depending on generation of a data output. A pull up delay part(20) is supplied with the pull up control signal and delays it with predetermined period to output it as a pull up delay signal(S3). A pull down delay part(30) is supplied with the pull down control signal and delays it with predetermined period to output it as a pull down delay signal(S4). A PMOS transistor(PUPM) for pull up is conducted by the pull up delay signal and outputs a power supply voltage(VDDQ) to an output terminal. An NMOS transistor(PDNM) for pull down is conducted by the pull down delay signal and outputs a ground voltage(VSSQ) to an output terminal.
