MICROPROCESSOR USING BASIC CACHE BLOCK

摘要

PROBLEM TO BE SOLVED: To provide a microprocessor using an instruction group and a cache mechanism matched with an instruction group format. SOLUTION: This microprocessor is provided with an instruction cracking unit constituted so that the first set of microprocessor instructions can be received, and the cracking unit compiles the set of the instructions as an instruction group. The instructions of the group are respectively provided with an instruction group tag. The processor is constituted of a basic cache block mechanism compiled with an instruction group format for caching the instruction group generated by the cracking unit.