Emulation of LED input characteristics in BICMOS process

摘要

An LED input emulator to interface a signal source designed for use with an LED optocoupler, to capacitive or other galvanic isolation circuitry, emulating LED forward and reverse bias voltages. VR reverse blocking circuitry includes MP1 and MP2 PMOS transistors coupled to an emulator anode port, and to emulate LED reverse bias voltage. VF control circuitry includes a variable resistance (MP3) coupled between anode and cathode ports, and a current control circuit coupled to an output node, and to control current through the variable resistance to maintain a desired forward voltage at the output node. In an example embodiment, the VF control circuitry is implemented with an amplifier and a bandgap voltage reference circuit coupled to the output node, generating both reference and feedback voltages input to the amplifier to control the variable resistance.

主权项

1. A system suitable to provide galvanic isolation between functional blocks, comprising:
a signal source block to drive source signals through an LED optocoupler characterized by a forward voltage and a reverse breakdown voltage; an LED input emulator circuit with emulator anode and emulator cathode ports coupled to the signal source block, and an emulator output node, the LED input emulator circuit to emulate a forward voltage VF at the emulator output node, and a reverse bias voltage VR across the emulator anode and cathode ports; and an isolation circuit, including a galvanic isolation interface that is not based on optocoupling, coupled to the emulator anode port, through the emulator output node, and to the emulator cathode port, to receive the source signals through the LED input emulator circuit; the LED input emulator circuit including:
VR reverse blocking circuitry coupled between the emulator anode port and both the emulator output node and the emulator cathode port, to emulate the reverse bias voltage VR, including
MP1 and MP2 PMOS transistors drain-coupled to the emulator anode port, and gate-coupled to the emulator cathode port, withMP1 source-coupled to the emulator output node; andMP2 source-coupled to the emulator cathode port; andVF control circuitry coupled to the emulator output node, to control the forward voltage VF at the emulator output node, including
a variable resistance circuit coupled between the emulator anode and cathode ports, to provide a variable resistance based on a VF control signal, anda current control circuit coupled to the emulator output node, to generate the VF control signal to control current through the variable resistance circuit based on a voltage at the emulator output node to maintain the voltage at the emulator output node at the forward voltage VF.