发明名称 ASIC logic BIST employing registers seeded with differing primitive polynomials
摘要 A method and apparatus for performing a built-in self-test ("BIST") on an integrated circuit device are disclosed. A BIST controller comprises a logic built-in self-test ("LBIST") engine capable of executing a LBIST and storing the results thereof and a multiple input signature register ("MISR"). The LBIST engine includes a LBIST state machine; and a pattern generator seeded with a first primitive polynomial. The MISR is capable of storing the results of an executed LBIST, the contents thereof being stored per a second primitive polynomial. A method for performing a LBIST comprises seeding a pattern generator in a LBIST engine with a first polynomial; executing a LBIST using the contents of the pattern generator; and storing the results of an executed LBIST in a MISR utilizing a second primitive polynomial.
申请公布号 US2003074621(A1) 申请公布日期 2003.04.17
申请号 US20010976708 申请日期 2001.10.12
申请人 DORSEY MICHAEL C. 发明人 DORSEY MICHAEL C.
分类号 G01R31/3185;G01R31/3187;G11C29/16;(IPC1-7):G01R31/28 主分类号 G01R31/3185
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