| 摘要 |
There is described signal-controlling apparatus coupled to each other through serial interfaces for bilaterally communicating data with synchronized clock signals. The apparatus includes signal-processing circuits, each of which includes a clock-generating section, a data communication line through which data signals are communicated between the signal-processing circuits, and a reference pulse communication line through which reference pulses are transmitted from a master signal-processing circuit to a slave signal-processing circuit. In a measuring time, the master signal-processing circuit transmits the reference pulses to the slave signal-processing circuit at intervals of a predetermined time period, and the slave signal-processing circuit receives the reference pulse to find a frequency deviation of clock signals by measuring an interval between the reference pulses with the clock signals. In the operating time after the measuring time, the slave signal-processing circuit adjusts the frequency deviation of clock signals, based on a result found in the measuring time.
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