摘要 |
There is provided a small size, high speed, versatile Reed-Solomon error correction decoding apparatus including a first operating unit (123) including a Galois field polynomial operation circuit (113) for obtaining a Galois field polynomial, a second operating unit (124) including a Galois field operation circuit (118) for performing an operation by using the Galois field polynomial, and a program generating unit (120) for generating a control program for the first and second operating units, wherein the first and second operating unit are provided in parallel with each other. Also, there is provided a small size, high speed, versatile Reed-Solomon error correction decoding apparatus including a first operating unit (123) including a Galois field polynomial operation circuit (113) for obtaining a Galois field polynomial and a register circuit (107) used when the Galois field polynomial operation circuit performs an operation, a second operating unit (124) including a Galois field operation circuit (118) for performing an operation by using the Galois field polynomial and a general-purpose operation circuit (116), a register unit (114) used when the first and second operating unit perform operations, and a program generating unit (120) for generating a control program for the first and second operating unit, wherein the first and second operating units and the register unit are provided in parallel with each other. |