| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To solve the problem that since an expensive counter circuit or clock signal generation circuit is required in the constitution of a conventional watch dog timer, a power source control circuit and an image forming apparatus become expensive. <P>SOLUTION: A clock signal in a predetermined cycle is inputted from an oscillation circuit 1, and the AC component signal of the clock signal is extracted by a capacitor 4 and a diode 5, and it is integrated by a capacitor 7 and a resistor 8, and a voltage signal is outputed, and when the voltage value of the voltage signal is not less than the gate threshold of an FET 9, a power is supplied from a power source 11 to an actuator 3, and when the voltage value of the voltage signal is not more than the gate threshold of an FET9, the power supply from the power source 1 to the actuator 3 is stopped. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
