发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce the defective read rate of a trimming parameter in an inspection process in a nonvolatile memory requiring trimming of word line voltage and read reference voltage at the time of read operation. <P>SOLUTION: Data for confirming erroneous read also is stored in a trimming parameter region 2 storing the trimming parameter in a memory cell array 1. When trimming, after the data for confirming erroneous read is read, it is compared with the expected value by a determination circuit 60, and at the time of unmatching, the trimming parameter of the word line voltage (read reference voltage) is gradually changed by a parameter change circuit 62, and this processing is repeated again. When a setting state in which data for confirming erroneous read can be read correctly is attained, the trimming parameter is read and held in a parameter holding circuit 9. Erroneous determination that a good product is determined as a defective product in the inspection process is avoided, and correct determination is performed as originally expected. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005190622(A) 申请公布日期 2005.07.14
申请号 JP20030433636 申请日期 2003.12.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ARAKAWA TAKESHI
分类号 G11C16/06;G11C16/02;(IPC1-7):G11C16/06 主分类号 G11C16/06
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