发明名称 PLL frequency synthesizer using charge pump
摘要 In order to reduce the possibility of disturbing the drain/absorption balance of a charge pump in the PLL frequency synthesizer using the charge pump, when the output voltage and output current of the charge pump come close to their driving limits, the power supply voltage of a voltage-controlled oscillator is changed to cancel a change in input voltage of the voltage-controlled oscillator.
申请公布号 US6940359(B2) 申请公布日期 2005.09.06
申请号 US20000557371 申请日期 2000.04.25
申请人 NEC CORPORATION 发明人 ISHII KATSUHIRO
分类号 H03L7/18;H03L7/089;H03L7/099;H03L7/10;H03L7/187;(IPC1-7):H03B5/00 主分类号 H03L7/18
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