发明名称 Methods of annealing after deposition of gate layers
摘要 A method of fabricating a gate structure includes depositing a high dielectric constant (high-k) dielectric layer over a substrate. The method further includes performing a multi-stage preheat high-temperature anneal. Performing the multi-stage preheat high-temperature anneal includes performing a first stage preheat at a temperature in a range from about 400° C. to about 600° C., performing a second stage preheat at a temperature in a range from about 700° C. to about 900° C., and performing a high temperature anneal at a peak temperature in a range from 875° C. to about 1200° C.
申请公布号 US9620386(B2) 申请公布日期 2017.04.11
申请号 US201414444706 申请日期 2014.07.28
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Tsai Chun Hsiung;Yu Xiong-Fei;Huang Yu-Lien;Lin Da-Wen
分类号 H01L21/28;H01L29/40;H01L21/324;H01L29/51;H01L29/66;H01L29/49;H01L29/78 主分类号 H01L21/28
代理机构 Hauptman Ham, LLP 代理人 Hauptman Ham, LLP
主权项 1. A method of fabricating a gate structure, the method comprising: depositing a high dielectric constant (high-k) dielectric layer over a substrate; and performing a multi-stage preheat high-temperature anneal, wherein performing the multi-stage preheat high-temperature anneal comprises: performing a first stage preheat at a temperature in a range from about 400° C. to about 600° C.,performing a second stage preheat at a temperature in a range from about 700° C. to about 900° C., andperforming a high temperature anneal at a peak temperature in a range from 875° C. to about 1200° C.
地址 TW