发明名称 Method of fabricating array substrate
摘要 A method of fabrication an array substrate which includes foaming an oxide semiconductor layer on a substrate; forming a gate insulating layer corresponding to a central portion of the oxide semiconductor layer; forming a first reactive metallic pattern and second reactive metallic patterns on the gate insulating layer and portions of the oxide semiconductor layer exposed outside the gate insulating layer, respectively; forming a gate electrode on the first reactive metallic pattern; forming source and drain areas having conductive properties in the oxide semiconductor layer by performing heat treatment such that materials of the second reactive metallic patterns are diffused into the oxide semiconductor layer contacting the second reactive metallic patterns; forming an inter insulating layer on the gate electrode and having first contact holes that expose the second reactive metallic patterns; and forming source and drain electrodes on the inter insulating layer and contacting the second reactive metallic patterns through the first contact holes, respectively.
申请公布号 US9640567(B2) 申请公布日期 2017.05.02
申请号 US201615040605 申请日期 2016.02.10
申请人 LG DISPLAY CO., LTD. 发明人 Yang Hee-Jung;Kim Hyung-Tae;Jeong Jae-Young;Han Gyu-Won;Kim Dong-Sun;Ho Won-Joon
分类号 H01L27/12;H01L29/786;H01L29/66 主分类号 H01L27/12
代理机构 Birch, Stewart, Kolasch & Birch, LLP 代理人 Birch, Stewart, Kolasch & Birch, LLP
主权项 1. A method of fabrication an array substrate, comprising: forming an oxide semiconductor layer on a substrate; forming a gate insulating layer corresponding to a central portion of the oxide semiconductor layer; forming a first reactive metallic pattern and second reactive metallic patterns on the gate insulating layer and portions of the oxide semiconductor layer exposed outside the gate insulating layer, respectively; forming a gate electrode on the first reactive metallic pattern; forming source and drain areas having conductive properties in the oxide semiconductor layer by performing heat treatment such that materials of the second reactive metallic patterns are diffused into the oxide semiconductor layer contacting the second reactive metallic patterns; forming an inter insulating layer on the gate electrode and having first contact holes that expose the second reactive metallic patterns; and forming source and drain electrodes on the inter insulating layer and contacting the second reactive metallic patterns through the first contact holes, respectively.
地址 Seoul KR