发明名称 |
INTERLOCKED POWER SUPPLY TRANSFER CIRCUIT TO INHIBIT SECONDARY TRANSFER AFTER A PRIMARY TRANSFER |
摘要 |
A transfer circuit to substitute a spare power supply for a failed one of a plurality of power supplies includes a logic circuit interlock arrangement to inhibit secondary transfers after the switching circuitry of the transfer circuitry has transferred the load from a first failed power supply to a spare power supply. The logic circuit interlock arrangement includes NAND gates and diode gates to complete an energy signal path to activate a transfer relay and apply inhibiting signals to disable subsequent energy signal paths and prevent secondary transfers.
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申请公布号 |
US3811050(A) |
申请公布日期 |
1974.05.14 |
申请号 |
US19730379059 |
申请日期 |
1973.07.13 |
申请人 |
BELL TEL LABOR INC,US |
发明人 |
MICHELET R,US;SILVERMAN E,US |
分类号 |
H02H11/00;H02J9/06;(IPC1-7):H02H11/00 |
主分类号 |
H02H11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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