| 摘要 |
Iterative units of an array are programmed for selected processing functions, for unit testing, and for avoidance of defective units, by loading mechanisms which permit a unit to be programmed and then to extend a loading path to an adjacent unit, so that loading paths may be established directly from unit to unit, with the loaded units serving as wires to transmit loading information to a unit to be loaded. After loading, the loading paths may be retracted (disconnected) leaving the loaded units in condition for the performance of desired processing functions. For example, the loaded units may form one or more shift registers, may serve as wires for transmitting test signals to and from a unit to be tested, and may be arranged to avoid defective units.
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