发明名称 Audio amplifier using multi-level pulse width modulation
摘要 The present invention relates in one aspect to a class D audio amplifier with improved output driver topology supporting multi-level output signals such as 3-level, 4-level or 5-level pulse width or pulse density modulated output signals for application to a loudspeaker load. The present class D audio amplifiers are particularly well-suited for high-volume consumer audio applications and solutions.
申请公布号 US9515617(B2) 申请公布日期 2016.12.06
申请号 US201113881509 申请日期 2011.10.27
申请人 Merus Audio ApS 发明人 Høyerby Mikkel
分类号 H03F99/00;H03F3/00;H03F3/217;H02M7/487 主分类号 H03F99/00
代理机构 Nixon Peabody LLP 代理人 Nixon Peabody LLP
主权项 1. A class D audio amplifier comprising: a first output driver comprising an output node connectable to a loudspeaker load to supply a load signal thereto, said first output driver comprising an upper leg coupled between a first DC supply voltage and the output node and a lower leg coupled between the output node and a second DC supply voltage, the upper leg comprising a first semiconductor switch and a second semiconductor switch coupled in series and controlled by first and second switch control terminals, respectively, the lower leg comprising a third semiconductor switch and a fourth semiconductor switch coupled in series and controlled by third and fourth switch control terminals, respectively; a controller adapted to receive an audio input signal and derive first, second, third and fourth pulse width or pulse density modulated control signals therefrom, the controller being configured to apply the first, second, third and fourth pulse width or pulse density modulated control signals to the first, second, third and fourth switch control terminals, respectively, the first, second, third and fourth pulse width modulated control signals being configured to, in a first state, connect a first terminal of the DC voltage source to the output node through the first and third semiconductor switches, and in a second state, connect a second terminal of the DC voltage source to the output node through the fourth and second semiconductor switches; and a first DC voltage source configured to set a first predetermined DC voltage difference between a first node, located between the first and second semiconductor switches, and a second node, located between the third and fourth semiconductor switches.
地址 Herlev DK