发明名称 Digital-to-analog converter circuit, an apparatus for providing a radio frequency transmit signal and a method of digital-to-analog conversion
摘要 A digital-to-analog converter circuit including a plurality of digital-to-analog converter cells is provided. A first digital-to-analog converter cell of the plurality of digital-to-analog converter cells includes a cell control module configured to provide alternatingly a first voltage and a second voltage to a first electrode of a capacitive element of the first digital-to-analog converter cell based on a digital input signal during a predefined time interval. A second digital-to-analog converter cell of the plurality of digital-to-analog converter cells includes a cell control module configured to provide a third voltage to a first electrode of a capacitive element of the second digital-to-analog converter cell during the predefined time interval. The first voltage is higher than an upper threshold voltage corresponding to a first digital threshold level of the digital input signal and the second voltage is lower than a lower threshold voltage corresponding to a second digital threshold level of the digital input signal. The third voltage is constantly between the upper threshold voltage and the lower threshold voltage.
申请公布号 US9490834(B2) 申请公布日期 2016.11.08
申请号 US201615048143 申请日期 2016.02.19
申请人 Intel IP Corporation 发明人 Leuschner Stephan;Fulde Michael;Sira Daniel;Knoblinger Gerhard
分类号 H03M1/66 主分类号 H03M1/66
代理机构 Eschweiler & Associates, LLC 代理人 Eschweiler & Associates, LLC
主权项 1. A digital-to-analog converter circuit comprising a plurality of digital-to-analog converter cells comprising: a first digital-to-analog converter cell comprising a cell control module configured to provide alternatingly a first voltage and a second voltage to a first electrode of a capacitive element of the first digital-to-analog converter cell based on a digital input signal during a predefined time interval, wherein the first voltage is higher than an upper threshold voltage corresponding to a first digital threshold level of the digital input signal and the second voltage is lower than a lower threshold voltage corresponding to a second digital threshold level of the digital input signal, and a second digital-to-analog converter cell comprising a cell control module configured to provide a third voltage to a first electrode of a capacitive element of the second digital-to-analog converter cell during the predefined time interval, wherein the third voltage is constantly between the upper threshold voltage and the lower threshold voltage during the predefined time interval.
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