| 摘要 |
PURPOSE:To secure a constant access to the memory with no consciousness of the refresh cycle, by dividing the memory into two banks at the even and odd address sides and refreshing one bank while the other bank is being given an access. CONSTITUTION:The memory is divided into two: even bank 6 and odd bank 7 to possess the even and odd addresses. When the reading action is indicated for the even address, control circuit 1 selects access address signal 19 to address switch 4 and gives indication 17 to supply the access address signal to bank 6. at the same time, indication 16 is given to select refresh RF address signal 23 to address switch 5, and RF indication signal 11 is applied to bank 7 to start the RF cycle. After this, reading data output 21 given from bank 6 to output switch 8 via output switch signal 9. Thus, the reading cycle of bank 6 and the RF cycle of bank 7 are carried out simultaneously. |
