| 摘要 |
PURPOSE:To read out an instruction at a high speed, by halting read-out of access by a bit of a read-out output of a decoding ROM after read-out of the first word has ended, in an instruction read-out request system having length of >=2 words. CONSTITUTION:When read-out of the first word is ended, an output of an FF102 sets an FF103 through a gate 101, and generates an access request signal MREQ. In this case, if a bit prescribed in advance, of a read-out output of a decoding ROM106 is ''1'', a signal CAN for halting a process of access is generated. This signal CAN passes through an OR gate 104, clears the FF103, halts the process of access before a CPU access permission signal is outputted, and also generates an end signal SRVO without waiting for read-out by a halt request signal. |
