发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize high gm and low capacitance simultaneously by isolating a substrate and an active layer by an insulating film and forming structure in which a lower gate is shaped selectively only just under an upper gate in a junction gate type field-effect transistor (J-FET). CONSTITUTION:In the J-FET such as an N channel type J-FET, the insulating film 42 (such as a SiO2 film) is shaped onto the P type substrate 41, the insulating film of a section functioning as a lower gate region is removed selectively, a P<+> type semiconductor layer 43 is formed to the whole surface by using a method such as an epitaxial method, and the unnecessary P<+> type layer 43 is removed through polishing and smoothed. It is preferable that a P<+> type layer 44 is selectively left only in one part of the insulating film at that time. An N type semiconductor layer 45 is grown onto the whole surface, a P<+> type gate region 47 is shaped onto the P<+> layer 44 through the known manufacture of the J-FET, and a source region 48 and a drain region 49 are formed. The J- FET having high gm and low capacitance is obtained because the lower gate region is molded only just under the upper gate region and the substrate and the active layer are isolated by the insulating film.
申请公布号 JPS5823484(A) 申请公布日期 1983.02.12
申请号 JP19810123266 申请日期 1981.08.05
申请人 NIPPON DENKI KK 发明人 TOKUE TATSUO;KANAMORI SHIYUUJI
分类号 H01L21/337;H01L29/80;H01L29/808;(IPC1-7):01L29/80 主分类号 H01L21/337
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