发明名称 MUTING CIRCUIT
摘要 PURPOSE:To obtain a large amount of muting by providing an FET and a transistor connected in series and in parallel respectively to a signal source and applying a mute signal to the gate of the FET and the base of the transistor. CONSTITUTION:When muting a signal from a signal source 1, a mute signal of positive voltage is applied from a muting terminal 2 to the gate of an FET-F1 and the base of a transistor T1. Consequently the FET-F1 becomes cut-off and the transistor T1 becomes on-state. As it is considered that when the FET-F1 becomes cut-off, the impedance of the signal source becomes very high equivalently, the amount of muting due to the transistor T1 can be made large.
申请公布号 JPS59207711(A) 申请公布日期 1984.11.24
申请号 JP19830081486 申请日期 1983.05.10
申请人 FUJITSU TEN KK 发明人 KURIOKA YUKIO
分类号 H03F1/00;H03G3/10;H04B1/10 主分类号 H03F1/00
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