发明名称 |
HETEROGENEOUS POCKET FOR TUNNELING FIELD EFFECT TRANSISTORS (TFETS) |
摘要 |
Embodiments of the disclosure described herein comprise a tunneling field effect transistor (TFET) having a drain region, a source region having a conductivity type opposite of the drain region, a channel region disposed between the source region and the drain region, a gate disposed over the channel region, and a heterogeneous pocket disposed near a junction of the source region and the channel region. The heterogeneous pocket comprises a semiconductor material different than the channel region, and comprises a tunneling barrier less than the bandgap in the channel region and forming a quantum well in the channel region to in crease a current through the TFET transistor when a voltage applied to the gate is above a threshold voltage. |
申请公布号 |
US2016276440(A1) |
申请公布日期 |
2016.09.22 |
申请号 |
US201315037296 |
申请日期 |
2013.12.23 |
申请人 |
INTEL CORPORATION |
发明人 |
Avci Uygar E.;KOTLYAR Roza;DEWEY Gilbert;CHU-KUNG Benjamin;YOUNG Ian A. |
分类号 |
H01L29/12;H01L29/205;H01L29/165;G11C5/06;H01L29/78;H01L29/06 |
主分类号 |
H01L29/12 |
代理机构 |
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代理人 |
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主权项 |
1. A tunneling field effect transistor (TFET) comprising:
a drain region; a source region having a conductivity type opposite of the drain region; a channel region disposed between the source region and the drain region; a gate disposed over the channel region; and a heterogeneous pocket disposed near a junction of the source region and the channel region, wherein the heterogeneous pocket comprises a semiconductor material different than the channel region, and wherein the heterogeneous pocket comprises a lower tunneling barrier than a bandgap of the channel region to form a quantum well to increase a current through the TFET transistor when a voltage applied to the gate is above a threshold voltage. |
地址 |
Snata Clara CA US |