| 摘要 |
PURPOSE:To improve the operating speed and also to suppress the increase of power consumption by switching sequentially a shift register through which data is transmitted at each clock of a data transfer clock. CONSTITUTION:A serial data input signal (a) is fed to a serial data input line 23 in synchronization with the trailing of a data transfer clock input signal (b). Furthermore, the signal (b) is frequency-divided by 1/2 by applying it to a toggle terminal T of a T FF19. A waveform of an output Q of the FF19 is used as a clock signal 28 of a shift register 14 and the register 14 is brought into the leading edge trigger form, then the output waveform of an FF15a is changed once at two clocks of the signal (b) and skipped for one data as D1, D3, D5... to data D1, D2, D3, D4, D5... of the signal (a). On the other hand, the other waveform of the FF19 is used as a clock signal 29 of the shift register 16 and the register 16 is brought into the leading edge trigger form similarly, the output waveform of a D FF17a is skipped for one data to the signal (a) as D2, D4... and serial data are shifted alternately. |
