| 摘要 |
PURPOSE:To prevent the formation of unnecessary channels due to parasitic MISs and improve reliability by a method wherein semiconductor regions, opposite in conductivity type to the channel types peculiar to the MISs, are provided in the semiconductor primary surface in the lower portion of a MISFET and are impressed with specified voltatges. CONSTITUTION:An n-channel type MISFET Qn is constituted of a single-crystal silicon layer 4, the region for an unnecessary channel, insulating film 6, conductive layer 7, semiconductor region 8. At the bottom of the siliocon layer 4, a P well region 2 is provided being aplied with a netative voltage Vss. A p-channel type MISFET Qp is constituted of the single-crystal silicon layer 4, the region for an unecessary channel, insulating film 6, conductive layer 7, semiconductor region 9. At the bottom of the silicon layer 4, a single-crystal silicon n<-> type semiconductor region 1 is provided to be exposed to a positive voltage Vcc. In this design, unnecessary channels are not created that would otherwise be present due to parasitic MISs respectively constituted of a combination of the region 2, film 3, layer 4 and a combination of the region 1, film 3, layer 4. |
